| Some flexibility can be gained by adding one microinstruction to the interpreter to use indirect threaded code. |
|
| The Microprogram Control Unit then issues a microinstruction that has a leading edge on the IR clock. |
|
| Rather than lose the performance, microprogrammers attempt to set up the branch status at least one full microinstruction before the conditional branch. |
|
| However, by adding the register-level microinstruction activity, the actual CPU implementation of the Fetch is more clearly understood. |
|
